The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 1990
Filed:
Mar. 08, 1989
Takayuki Ootani, Tokyo, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A semiconductor integrated circuit equipped with an input buffer operation error preventing circuit is disclosed. A semiconductor integrated circuit comprises a data output signal level detector circuit for detecting at least one of a variation from a low level to a high level and that from a high level to a low level of a signal outputted from a circuit of a stage preceding an output buffer and for generating a clock pulse and an input buffer threshold level control circuit for controllably varying the threshold level of a first-stage gate in an input buffer by inputting the clock pulse so as to cancel a fall in an input level detection margin of the input buffer which is caused when the output data of the output buffer varies from a '0' level to a '1' level and vice versa.