Non-current hogging dual phase splitter ttl circuit

Abstract

Dual phase splitter transistor elements, an output phase splitter transistor element and a secondary phase splitter transistor element, are coupled in current mirror configuration in a TTL output buffer circuit. The output phase splitter transistor element is coupled to the pullup and pulldown transistor elements for controlling the respective conducting states of the pullup and pulldown transistor elements. The collector of the secondary phase splitter transistor element is coupled in a supplemental circuit which can have a variable load without direct connection to the pullup transistor element and output. A low impedance current sourcing active transistor element is coupled in emitter follower configuration at the collector node of the secondary phase splitter transistor element for supplying mirroring current through the emitter of the secondary phase splitter transistor element to reduce current hogging at the dual phase splitter transistor elements. The current sourcing transistor element is coupled in parallel with the supplemental circuit thereby providing a variable current which varies inversely with the collector current supplied by the supplemental circuit. The invention is applied in a JK flip flop circuit as the output buffer circuits with the collector of the secondary phase splitter transistor element coupled to the cross feedback circuit. The cross feedback transistor element in the cross feedback circuit is therefore isolated from the pullup transistor element and output avoiding feedback transistor breakdown when the output is at high potential. The current sourcing transistor element prevents current hogging between the dual phase splitter transistor elements.