The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 1990

Filed:

Sep. 30, 1988
Applicant:
Inventors:

Kazumi Hatayama, Hitachi, JP;

Terumine Hayashi, Hitachi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518908 ; 365201 ; 371 211 ; 371 226 ;
Abstract

A memory incorporating logic Large Scale Integration (LSI) and a method for testing the same LSI includes signal path switching circuit portions which are disposed in the paths of a memory portion and a logic circuit portion. A test signal input and an output signal can be observed at an input and output terminal portion so as to be able to effect a dynamic function test of the memory portion. Further there is disposed a logic circuit test signal memory circuit portion, which switches over the signal path switching circuit portions to the logic circuit portion so as to be able to effect a test of the logic circuit portion, independently of the state of the memory portion.


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