Monolithic sampler

Abstract

A Monolithic Sampler is disclosed. The present invention overcomes the problem of inadequately low sampling rates that results from circuit designs or component limitations that constrain the bandwidths of previous instruments. The sampler includes five circuit stages: a local oscillator section that may be used to drive the system, a shock wave generator that produces high frequency edge-sharpened pulses, a reflection damping clamping section, a delay section, and a sampler section regulated by the stream of shock waves which produces an IF output. The local oscillator or a pulse generator (not shown) produces an input that propagates down a nonlinear transmission line. Once this input reaches the shock wave generator section, it encounters a series of hyperabrupt diodes which are employed as voltage dependent capacitors called varactors. These varactors deform the input pulses and generate a stream of spike-shaped waveforms known as shock waves. The shock waves successively energize sampling diodes in the sampling section of the circuit. When these diodes are energized, they open pathways from an RF input to sampling capacitors which charge up with small representative bits of current from the input. A sample or snapshot of the input is drawn from these capacitors through an IF output coupling network. The clamping and delay sections of the sampler minimize spurious ringing throughout the circuit and manage the timing of the oscillation of these reflections. The entire sampler is monolithically integrated on a single substrate using conventional semiconductor fabrication and packaging techniques.