Random access memory having separate read out and write in bus lines for

Abstract

A dynamic random access memory device includes a pair of write-in data transferring buses for transferring data to be written, a pair of read-out data transferring buses for transferring data to be read provided additionally and separately from the write-in data transferring bus pair and a plurality of current mirror type sense amplifiers formed of CMOS transistors and each amplifier being provided between a bit line pair and the read-out data transferring bus pair and having input nodes connected to the corresponding bit line pair and the read-out data transferring bus pair forming output nodes thereof. The current mirror type sense amplifiers of CMOS transistors are activated in response to an output of a column decoder at earlier time than the time when conventional flip-flop type sense amplifiers are activated.