The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 04, 1990
Filed:
May. 30, 1989
Dov-Ami Vider, Sunnyvale, CA (US);
Cypress Semiconductor Corp., San Jose, CA (US);
Abstract
Apparatus for controlling the programming voltage of an EPROM array composed of a plurality of programmable floating gate MOS cells, which includes an additional floating gate MOS cell fabricated on the same chip and in the same manner as the array of cells, the additional cell not being connected for programming during the normal programming of the array. A voltage is applied to the additional cell to generate a drain current through the cell. A feedback control is connected between the source of external programming voltage for the array and the actual voltage within the array used for programming the cells, the feedback control using the amplitude of the drain current in the additional cell to control the magnitude of the actual programming voltage in the array in such a manner that when the drain current of the additional cell increases, the programming voltage decreases proportionately. The drain current in the additional cell can also be used for compensating for variations in the fixed programming voltage.