The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 1990

Filed:

Aug. 31, 1988
Applicant:
Inventors:

Jeffrey Biber, Sterling, VA (US);

Jeffrey Cohen, Silver Spring, MD (US);

John Holmbald, Oakton, VA (US);

Zon-Hong Hsieh, Potomac, MD (US);

Douglas Kay, Chevy Case, MD (US);

Roy Spitzer, Vienna, VA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
370 60 ; 370 941 ;
Abstract

A data communications system has a layered communication architecture including network services protocols including a link layer and higher level protocols, and has IBM or IBM-compatible synchronous data link control (SDLC) devices including a host computer and a plurality of end user devices desiring to communicate across an X.25 packet-switching network (PSN) of the communications system. A packet assembler/disassembler (PAD) support X.25 communication across the PSN between the SDLC-utilizing host computer and the SDLC-utilizing end user device. In one embodiment, separate high level data link control (HDLC) PADs are provided at each end of the PSN operationally associated with the host computer and the plurality of end user devices, respectively. The PADS generate and respond to at least three formats of SDLC commands and responses, and, in association with their respective SDLC devices, perform at least four functions including a call setup phase, a data transfer phase, a call clearing phase, and handling of abnormal conditions. PAD means comprises qualified logical link control (QLLC) PAD means located at an end of said packet switching network for either operational association with said host computer or operational association with said plurality of end user devices. In another embodiment, a single qualified logical link control (QLLC) PAD performs functions similar to those of the HDLC PAD embodiment, except that rather than having a PAD at both ends (host end and terminal end) of a connection, a PAD is provided at only one end of the connection.


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