The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 1990
Filed:
May. 05, 1989
Applicant:
Inventor:
Arthur J Edwards, Hoffman Estates, IL (US);
Assignee:
Motorola Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 18 ; 361 42 ; 361 74 ; 361 86 ; 323901 ; 363 50 ;
Abstract
A bi-level control signal is applied to an FET while the FET's drain-to-source voltage is sensed. The control signal includes a first, relatively low test level followed by a second, relatively higher operating level. The magnitude and duration of the test level are selected to produce a non-destructive current in the FET, even if the load has been shorted. If the value of the sensed drain-to-source voltage is indicative of an abnormal load condition, the FET is turned off. Otherwise, the FET is turned on by the second, relatively higher operating level of the control signal.