The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 1990
Filed:
May. 19, 1989
Takeshi Kono, Kawasaki, JP;
Tatsuro Yoshimura, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
An LSI system includes; a multi-layer print board; and a plurality of LSI circuit chips mounted on the multi-layer printed circuit board, each including a plurality of pins, a reference voltage terminal, a pin scan out terminal and a plurality of pin scan out circuits corresponding to the pins on a one-to-one basis. The multi-layer printed circuit board includes a reference voltage feeding layer formed therein in a form of a mesh or a sheet, at least one further layer overlying the reference voltage feeding layer and a plurality of through holes extending through each such further layer. By electrically connecting each reference voltage terminal of the plurality of LSI circuit chips through a corresponding through hole to the reference voltage feeding layer, a substantially equal reference voltage can be fed to each LSI and the voltage drop thereof is reduced.