The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 1990
Filed:
May. 01, 1989
Vernon P O'Neil, II, Tempe, AZ (US);
Jesus A Navarro, Chandler, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A baseband carrier phase corrector is disclosed which permits rapid demodulation and demodulation of varying RF input signals. The baseband carrier phase corrector receives RF signals, or alternatively, IF signals, and converts the signals to baseband. An RF signal received by the baseband carrier phase corrector is split and multiplied with oscillating signals having a 90 degree phase differential. The resultant signals are baseband in-phase (I) and quadrature (Q) signals. The I and Q signals are filtered through low pass filters. The filtered I and Q signals are multiplied within a first complex multiplier with a generated phase error. The output of the first complex multiplier results in phase adjusted I and Q baseband signals. A symbol decision circuit estimates digital I and Q signals which are the allowed symbols closest in phase to the phase adjusted I and Q baseband signals. A second complex multiplier is coupled to the symbol decision circuit and to the outputs of the low pass filters. The second complex multiplier generates a phase error by multiplying the digital I and Q signals from the symbol decision circuit with the filter and I and Q signals received from the low pass filter. This phase error is the difference in phase between the digital I and Q signals estimated in the symbol decision circuit and the filtered I and Q signals. The phase error is conjugated and relayed to the first complex multiplier as the above reference generated phase error. When the generated phase error is multiplied with the filtered I and Q signals in the first complex multiplier, the phase error portion of the I and Q signals cancel leaving phase adjusted I and Q baseband signals. When the phase error received by the first complex multiplier is zero, the carrier phase corrector has locked onto the phase and frequency of the input of signal, and the estimated digital I and Q signals are output from the carrier phase corrector.
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