The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 1990
Filed:
Mar. 24, 1988
Perry H Pelley, III, Austin, TX (US);
Ruey J Yu, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An input buffer for translating TTL level signals to ECL level signals has a level shifter having a first and a second inupt transistor. The first input transistor receives the input signal and the second transistor receives a reference voltage. First and second transistor loads are coupled to the first and second transistors, respectively. Both the first and second loads are biased to the same saturation current. The saturation current is derived from a current source. The reference voltage is set at a voltage which is between the maximum voltage of a logic low of the input signal and the minimum voltage of a high of the input signal. The deferential level shifter develops a voltage differential which is converted to ECL level signals by a differential amplifier.