The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 1990

Filed:

Apr. 01, 1988
Applicant:
Inventor:

John H Zurawski, Stow, MA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364757 ; 364749 ;
Abstract

A method and apparatus for performing high performance multiplication in a computer central processor unit which implements a sliced design configuration. Each slice changes its 'personality' by virtue of receiving consecutive bits of the multiplicand. The receipt of consecutive bits by each slice eliminates the need for the interconnection of successive slices in separate chips. Thus, the apparatus allows the avoidance of significant timing delays, inherent in such interchip connections, which diminish computer system multiplication performance, and allows the multiply cycle time to be as fast as a latch-to-latch transfer across chips.


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Zurawski, John. (1990). Apparatus for high performance multiplication (U.S. Patent No. 4941121). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4941121

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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