The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 1990
Filed:
Feb. 28, 1989
Robby Reinholz, Berlin, DE;
Siemens Aktiengesellschaft, Berlin & Munich, DE;
Abstract
An arrangement for testing printed-circuit boards, in the case of a known arrangement, the adaptor device contains two sets of printed-circuit boards arranged side-by-side, which each have contacts on their narrow input-side in an interval, which corresponds to half of the standard contact spacing. Circuit-board conductors connect these contacts to contact elements on a narrow output-side, opposite the narrow input-side. These contact elements lie in standard contact spacing. By placing the two sets of printed circuit-boards, one over another in a cross-wise arrangement, a printed-circuit board to be tested with a small contact spacing can be connected to contact surfaces in a basic grid. Supporting the adaptor device, when contact is made with the test place, is made more difficult, as a result of the contact elements located on the bottom side. In the arrangement, the contact elements in the area of at least one narrow output-side of each printed-circuit board bordering on the narrow input-side are arranged one behind the other in the direction of the narrow output-side. Contact pieces of an electric connection panel are situated in bore holes introduced from one narrow output-side and extending up to the contact elements. In the arrangement, the adaptor device can easily be adequately supported on the side opposite the printed-circuit board to be tested.