The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 1990

Filed:

Sep. 21, 1989
Applicant:
Inventors:

Michael R Seacrist, Grapevine, TX (US);

Joe R Trogolo, Plano, TX (US);

Kenneth M Bell, Windom, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 31 ; 437 40 ; 437 47 ; 437 60 ; 437 76 ; 357 22 ; 357 43 ; 357 51 ; 357 59 ;
Abstract

A unified process flow for the fabrication of an isolated vertical PNP (VPNP) transistor, a junction field effect transistor (JFET) and a metal/nitride/polysilicon capacitor includes the simultaneous fabrication of deep junction isolation regions (36, 121) and a VPNP buried collector (28). Junction isolation is completed by the doping and diffusion of shallow junction isolation regions (46, 122) at the same time that deep collector regions (48) are formed. A JFET source region (74) and a drain region (76) are formed simultaneously with a VPNP emitter region (70). A JFET gate contact region (88) is formed simultaenously with a VPNP base contact region (84), a VPNP buried region contact (86) and optionally with the doping of a capacitor electrode (124).


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