The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 1990

Filed:

Dec. 19, 1986
Applicant:
Inventors:

William J Dally, Arlington, MA (US);

Charles L Seitz, San Luis Rey, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ;
U.S. Cl.
CPC ...
370 60 ; 370 8512 ;
Abstract

A deadlock-free routing system for a plurality of computers ('nodes') is disclosed wherein each physical communication channel in a unidirectional multi-cycle network is split into a group of virtual channels, each channel of which has its own queue, one at each end. Packets of information traversing the same physical channel are assigned a priority as a function of the channel on which a packet arrives and the node to which the packet is destined. The packet's priority is always increasing as it moves closer and closer to its destination. Instead of reading an entire packet into an intermediate processing node before starting transmission to the next node, the routing of this invention forwards every flow control unit (flit) of the packet to the next node as soon as it arrives. The system's network is represented as a dependency graph, which graph is re-ordered to be cycle free. The resulting routing function of the cycle free channel dependency graph is rendered deadlock-free, and the system's cut-through routing results in a reduced message latency when compared under the same conditions to store-and-forward routing.


Find Patent Forward Citations

Dally, William. (1990). Torus routing chip (U.S. Patent No. 4933933). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4933933

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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