Method for designing a control sequencer

Abstract

A method for designing a control sequencer having a high level counter element and a programmable AND array suitable for control applications. The method utilizes high level constructs bearing a one-to-one relationship to the architecture of the apparatus so that the design of the controller is facilitated resulting in a rapidly-executed program which is easy to comprehend, verify and document. Moore and Mealy state machines are readily implemented by the controller by virtue of its programmable AND array and counter which allow the next-state and output to be based on the contents of the counter as well as any set of input signals. Conditional testing can be made entirely state dependent, partially-state dependent, or state-independent. Multiway branching is also readily implemented since the presence of the programmable AND array allows the user to specify a number of sets of input conditions, so that from a given state, as determined by the counter contents, each set of input condition gives rise to a transition to a specified next state. Instruction decoding for the controller is preformed in the programmable AND array, and thus can be specified by the designer in the high-level software method of the invention. Accordingly, instructions can be stored in the AND array in a logical form directly usable by the hardware. The counter is preferably of the Gray-code type so as to minimize instabilities in the output signals and to permit easy optimization of Boolean expressions involving the state of the device. Dedicated buried registers are provided as are dedicated feedback paths from the outpout registers, dedicated registers and counter to the AND array. Two separate OR arrays are provided, one generating output signals, the other generating control sequencing signals.