Integrated circuit device for orthogonal transformation of

Abstract

The device, for performing an orthogonal transformation of two dimensional discrete data array of n x n matrix at a high speed, includes a first block including storage elements for storing individual elements of a matrix for orthogonal transformation, a second block including storage elements for storing a data array therein, and a third block including a plurality of storage elements for storing a result of a multiplication therein, and n x n pointer registers each making a shifting operation in the row direction. When the pointer registers are reset, only diagonal elements thereof produce an activating signal. The device further includes circuitry for selecting a response to a signal from the pointer block, particular ones of the elements of the first, second and third blocks, multiplying contents of the selected elements of the first and second blocks, and adding a result of the multiplication to contents of the selected element of the third block and writing a result of the addition back into the selected elements of the third block. The device further includes a shifting clock generator which sets the shifting direction of the first and second storage blocks. After completion of the first matrix multiplication, result of the multiplication is transferred from the third storage block to the second storage block. Upon second matrix multiplication, shifting operations of the first and second blocks are performed in directions different from the directions in the first matrix multiplication.