The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 1990

Filed:

Apr. 05, 1989
Applicant:
Inventors:

Taira Matsunaga, Yokohama, JP;

Takashi Kimura, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
357 2313 ; 357 233 ; 357 234 ; 357 238 ; 357 2311 ;
Abstract

A protection diode structure for a MOS transistor which includes a semiconductor substrate layer and a gate electrode insulated from the semiconductor substrate layer and in which a driving voltage is applied therebetween to create an inversion layer in an operating mode, includes a first semiconductor layer, a second semiconductor layer formed in the first semiconductor layer and connected to the gate electrode, and a third semiconductor layer formed to surround the first semiconductor layer, uniformly separated from the second layer, and connected to the semiconductor substrate layer, wherein the first and second semiconductor layers constitute a first diode having a breakdown voltage greater than the driving voltage and less than the gate withstand voltage of the MOS transistor, and the first and third semiconductor layers constitute a second diode having a breakdown voltage less than the gate withstand voltage of the MOS transistor. In this protection diode structure, the junction area of the second diode is set larger than that of the first diode by uniformly separating the third semiconductor layer from the second semiconductor layer. The semiconductor substrate layer and first semiconductor layer are formed of a first conductivity type and the second and third semiconductor layers are formed of a second conductivity type. Thus, the first PN junction diode is reversely biased by application of the drive voltage and the second PN junction diode is forwardly biased by application of the drive voltage.


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