The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 1990
Filed:
Nov. 14, 1988
Richard M Swanson, Los Altos, CA (US);
Electric Power Research Inst. Corp. of District of Columbia, Palo Alto, CA (US);
Board of Trustees of the Leland Stanford California Corporation, Stanford, CA (US);
Abstract
A back surface point contact silicon solar cell having improved characteristics is fabricated by hydrogenating a silicon-silicon oxide interface where hydrogen atoms are diffused through silicon nitride and silicon oxide passivating layers on the surface of a silicon substrate. In carrying out the hydrogenation, the substrate and passivation layers are placed in a hydrogen atomsphere at an elevated temperature of at least 900.degree. C. whereby hydrogen atoms diffuse through the two passivation layers. Self-alignment techniques are employed in forming small-geometry doped regions in the surface of the silicon substrate for the p-n junctions of the solar cell. Openings are formed through the passivation layers to expose first surface areas on the substrate, and a doped silicon oxide layer is then formed over the passivation layers and on the exposed surface areas. Portions of the first doped layer on the two passivation layers are removed and then second portions of the two passivation layers are removed, thereby exposing second surface areas. A second doped silicon oxide layer is then formed over the passivation layers and on the second exposed surface areas. Dopants from the two doped silicon oxide layers are then diffused into the first and second surface layers to form p and n diffused regions in the surface of the substrate. Thereafter, the first and second doped silicon oxide layers are removed by a preferential etchant which does not remove the silicon nitride layer, thereby exposing the first and second surface areas. A two-level metal interconnect structure is then formed for separately contacting the first surface areas and the second surface areas.