The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 1990
Filed:
Nov. 01, 1988
Richard L Gray, Cupertino, CA (US);
Raymond Chan-Man Yan, Daly City, CA (US);
Bruce Rosenthal, Los Gatos, CA (US);
Teledyne Semiconductor, Mountain View, CA (US);
Abstract
An ESD protection circuit, suitable for use as part of an integrated circuit, limits the voltage potential at the contacts of the integrated circuit to a voltage potential difference range relative to, though extending beyond the voltage source potentials of the circuit protected. The ESD protection is effective regardless of whether the integrated circuit is powered. The ESD protection circuit includes a clamp subcircuit for limiting the voltage potential at a clamp point to a first voltage range approximately defined by the voltage source potentials and a voltage offset subcircuit, coupled between the clamp point and an integrated circuit contact, to establish a second voltage range encompassing the first voltage range. The voltage offset subcircuit conducts current between the clamp point and the contact to limit the voltage potential at the contact to the second voltage range.