Time delay and integration of images using a frame transfer ccd sensor

Abstract

A tachometer (32) monitors the speed of a continuously moving web or article (12). A lens (20) focuses an image of a portion of the web in an examination region (14) on image section (22) of a CCD array. As the web moves, the image moves correspondingly along the image section. A synchronizing circuit (C) adjusts the frequency of the tachometer output signal and uses it in lieu of a fixed frequency oscillator as the master clocking or timing basis for generating clocking pulses for the CCD array. More specifically, the synchronizing circuit generates four phase clocking pulses (.phi.1A-.phi.4A) which shifts lines of CCD data along the image section at the same speed that the image is moving along the CCD section. In this manner, the pixel values integrate light from the same area of the imaged web at each shifted position along the image section. Each line of data from the image section may be shifted at the same rate through an optically light-insensitive storage section (24) and read out serially by shift registers (26) to form a video signal. A quality control analysis circuit (D) monitors the video signal for selected characteristics of the imaged web. Preferably, a record is maintained of the location of flaws and defects noted by the quality analysis circuit.