The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 1990
Filed:
Nov. 19, 1986
Atsushi Hasebe, Kangawa, JP;
Ryohei Kato, College Park, MD (US);
Sony Corporation, Tokyo, JP;
Abstract
An information processing apparatus comprising a program supplying portion, write signal generator, and a data processor, which includes a microprogram controller, microprogram memory, arithmetic unit, and a selector for selecting in an alternative way an address from the microprogram controller and an address from the program supplying portion and supplying the same to the microprogram memory. In the apparatus, it is adapted such that, in a first (program execution) mode, the address from the microprogram controller is supplied through the selector to the microprogram memory, in a second (reset, or stop) mode, the microprogram controller is supplied with a signal, whereby the same is caused to continuously generate program start addresses, and in a third (program transfer) mode, the address from the program supplying portion is supplied through the selector means to the microprogram memory and, according to a write signal from the write signal generator, the program from the program supplying portion is written in the microprogram memory. When supplying a plurality of different programs from the program supplying portion to the processors operating under the program, such a method can be used to treat the whole of the plurality of different programs as one program and supply this program to the processors at one time of transfer and separately supply an execution start address of one program out of the plurality of different programs to each of said processors.