Three-dimensional cmos inverter

Abstract

A semiconductor device comprises a semiconductor substrate of first conductivity type with a major surface having an element isolation region formed on it. It further comprises island regions formed in the major surface region of said substrate and electrically isolated by said element isolation region, source and drain regions of second conductivity type formed in at least one of said island regions and electrically isolated from each other, thereby defining a channel region between them, a first gate insulating film formed on that surface portion of said island region in which at least said channel region is formed, a first gate electrode formed on said gate insulating film, a second gate insulating film formed on said gate electrode, an active layer made of recrystallized polysilicon, formed on said second gate insulating film, and consisting of source and drain regions of the first conductivity type and a channel region of the second conductivity type sandwiched between the source and drain regions, a third gate insulating film formed on that surface portion of said active layer in which at least the channel region is formed, and a second gate electrode formed on said third gate insulating film and connected to said first gate electrode.