The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 1990

Filed:

Jan. 28, 1988
Applicant:
Inventors:

Tadashi Maruyama, Yokohama, JP;

Yukio Wada, Yokohama, JP;

Tomohisa Shigematsu, Yokohama, JP;

Yasoji Suzuki, Yokohama, JP;

Makoto Yoshizawa, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365185 ; 357 235 ;
Abstract

In a nonvolatile semiconductor memory according to the invention, a power source voltage of 5 V used in an ordinary read mode is applied to a read line in the data read mode without changing its value. If a write line, a selection gate line, a control gate line, and a read line are respectively set at 0 V, 5 V, 0 V, and 5 V in the data read mode, the potential at an n-type diffusion layer becomes 0 V. In this case, the potential at the control gate line is 0 V, and the potential at a floating gate electrode becomes substantially 0 V. That is, an electric field is not applied to a thin insulating film located between the floating gate electrode and the n-type diffusion layer. As a result, electron injection and discharge due to the tunnel effect do not occur.


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