The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 1990

Filed:

Oct. 30, 1987
Applicant:
Inventor:

Bob C Liang, West Hurley, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364521 ; 364522 ; 340747 ;
Abstract

A Pipeline and Parallel Processing system for generating Surface Patches for both Wireframe and Solid/Shaded Models in a Raster Graphics Display. The inputs to a Transformation Processor are the parameters for the Rational Bezier Surfaces: a 2-dimensional array of control points, and weights. The outputs are the coordinates of the corner points and the normals (to the surface) of the patches, which make up the surface. The system consists of three Pipeline stages: (1) A front-end processor fetches the data from memory and feeds the Transformation Processor; (2) four Floating Point Processors in Parallel for tessellating the surfaces into small patches; and (3) one Floating Point Processor for generating normals at the vertices of the small patches. The output is sent to the rest of the Graphics System for clipping, mapping, and shading.


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