The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 1990

Filed:

Aug. 25, 1987
Applicant:
Inventors:

Dan Maydan, Los Altos Hills, CA (US);

Sasson R Somekh, Redwood City, CA (US);

Charles Ryan-Harris, La Honda, CA (US);

Richard A Seilheimer, Pleasanton, CA (US);

David Cheng, San Jose, CA (US);

Edward M Abolnikov, San Francisco, CA (US);

Lance S Reinke, San Jose, CA (US);

J Christopher Moran, Mountain View, CA (US);

Richard M Catlin, Jr, Foster City, CA (US);

Robert B Lowrance, Santa Clara, CA (US);

Gregory W Ridgeway, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B65G / ;
U.S. Cl.
CPC ...
414217 ; 414786 ; 414225 ; 414730 ; 414416 ; 414331 ; 414732 ; 414917 ; 4147442 ; 414751 ; 414741 ; 118503 ; 118500 ; 118 50 ; 118729 ; 432239 ; 901 47 ; 294 90 ; 2941191 ;
Abstract

A wafer processing system includes an autoloader mounted within a load lock for providing batch, cassette-to-cassette automatic wafer transfer between the semiconductor processing chamber and cassette load and unload positions within the load lock. The system provides rapid, contamination-free loading and unloading of semiconductor wafers.


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