The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 1990
Filed:
Feb. 18, 1988
Applicant:
Inventors:
Rafael C Camarota, San Jose, CA (US);
H William Wang, Saratoga, CA (US);
Assignee:
Saratoga Semiconductor Corporation, Cupertino, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518908 ; 365154 ;
Abstract
Disclosed is a memory cell which includes a plurality of pass gates in the read word and write word lines. The pass gates are connected in series and each pass gate is controlled by a separate line, namely, by a write word line or a read word line. By use of two or more pass gates in this manner, logical functions, such as logical AND functions are performed within the memory cell.
Camarota, Rafael. (1990). Memory cell with a plurality of pass gates (U.S. Patent No. 4910712). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4910712
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile