The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 1990

Filed:

Apr. 20, 1987
Applicant:
Inventors:

Yasuhiko Hara, Machida, JP;

Hideaki Doi, Yokohama, JP;

Koichi Karasaki, Hadano, JP;

Akira Sase, Katsuta, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06K / ;
U.S. Cl.
CPC ...
382-8 ; 382 34 ; 382 48 ;
Abstract

A printed wiring board circuit-pattern inspection system including a two-dimensionally movable table on which a reference printed wiring board and a printed wiring board to be inspected are placed one after another; an image pickup unit which picks up an image of a circuit-pattern on a printed wiring board by scanning the circuit-pattern in two dimensions, and converting the image into a video signal, a binary pixel forming unit which transforms the video signal into binary pattern data, synchronous signal generator which generates a synchronous signal in synchronism with the scanning operation, a first buffer memory which stores binary pattern data, compressed pattern data memory which stores compressed binary pattern data of a whole reference printed wiring board, data compander which compresses and expands binary pattern, in accordance with the synchronous signal, a second buffer memory which stores, binary pattern data compressed by the data compander and the binary data retrieved from the compressed pattern data memory, and a comparator which compares the reference binary pattern data retrieved from the first buffer memory with the binary pattern data of the board under inspection the synchronous signal thereby providing indication of a defect in the board under inspection.


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