The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 1990

Filed:

Sep. 22, 1988
Applicant:
Inventor:

Shoichi Mizoguchi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B / ;
U.S. Cl.
CPC ...
375 15 ; 375106 ;
Abstract

In an adaptive equalizer system for equalizing, in response to a plurality of controllable tap gains, a received signal carrying a transmission data sequence digitized by a reference clock signal, a correlation detecting circuit (63') comprises a divider (111) for frequency dividing a reproduced clock signal representative of a reproduction of the reference clock signal to produce a divided clock signal. A serial-parallel converter (120) is for converting a reproduced data sequence representative of a reproduction of the transmission data sequence and a digital error signal relative to the reproduced data sequence into a plurality of converted data sequences and a plurality of converted error signals in synchronism the divided clock signal. As Exclusive logic circuit (70) is for carrying out an exclusive logic operation on the converted error signals and the converted data sequences to produce a plurality of correlation signals which are collectively used in controlling the controllable tap gains.


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