The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 1990

Filed:

Feb. 22, 1989
Applicant:
Inventor:

Bruce J Tesch, Melbourne, FL (US);

Assignee:

Harris Corporation, Melbourne, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323280 ; 323303 ; 330284 ; 330294 ;
Abstract

The feedback control loop of the common-emitter output transistor stage of a low dropout voltage regulator imcorporates a staggered pole-zero network, which effectively introduces an incremental reduction, or rolloff, in gain, and an accompanying reduction in phase shift with increase in frequency, so that, at the unity gain point of the transfer characteristic, there is still substantial phase margin, thus preventing the circuit from being driven into oscillation. The RC load pole location can vary widely and stability is maintained. The network is configured as a staggered resistor-capacitor network comprised of plural resistor-capacitor circuits coupled in cascade between the output of the feedback error amplifier and the input of a buffer amplifier the output of which drives the base of the output stage transistor in order to offset loading effects of the transistor base on the staggered pole-zero network.


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