The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 1990

Filed:

Jan. 03, 1989
Applicant:
Inventors:

Richard D Newberry, Hadley, MA (US);

Roger W Williams, Jr, Springfield, MA (US);

Assignee:

R. E. Phelon Company, Inc., East Longmeadow, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
F23Q / ;
U.S. Cl.
CPC ...
431 46 ; 431 71 ;
Abstract

Electronic control system for an oil burner has a primary direct current power source controlled by a thermostat and a secondary direct current power source independent of the thermostat. A first relay is in circuit with the oil burner motor to energize the same and a second relay is in series with the first and with an alternating voltage source for energizing the ignitor of the furnace. An electronic circuit controls the first relay switch and includes a pair of silicon controlled rectifiers (SCR's) connected in series for energizing the first relay. A second electronic circuit includes a pair of interconnected NPN transistors for controlling the operation of the second relay switch. The first NPN transistor is conductive when the second relay switch is energized and the second NPN transistor is connected to the first to turn 'OFF' the same in response to flame being sensed in the furnace. A flame sensing element in the furnace is associated with a control relay for controlling a pair of relay switches, one of which is in series with the SCR's and the other is adapted to energize a redundant pair of time-delay circuits. Each time-delay circuit includes a capacitor and a programmable unijunction transistor (PUT) programmed to breakover at a voltage which is a function of a first predetermined time for charging a capacitor and a resistance in the cathode circuit of each PUT which provides for a second predetermined time for the discharge of the capacitor voltage to hold the second relay 'OPEN' by conduction through the second NPN transistor. Another electronic circuit includes an NPN transistor and PNP transistor connected to energize the first relay switch.


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