The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 1990
Filed:
May. 31, 1989
Robert E LaMarche, Atlantic Highlands, NJ (US);
American Telephone and Telegraph Company, New York, NY (US);
AT&T Bell Laboratories, Murray Hill, NJ (US);
Abstract
Combinatorial (Boolean ) logical functions are provided in a programmable optical logic device by combining a symmetric self-electrooptic effect device (S-SEED) with a logic control element for optically programming the S-SEED to initiate logic operations in a predetermined mode. A predetermined reference threshold optical signal is applied to one input of the S-SEED while first and second optical data signals are jointly applied to another input of the S-SEED to permit the desired combinatorial logic operation to be performed on the optical data signals by the optical logic device. As such, the programmable optical logic device is said to perform threshold logic operations. Logic operations which may be programmed into the optical logic device include AND, OR and NOT functions. A single optical signal is provided as output from each optical logic device. In one embodiment of the invention, a first threshold optical signal is utilized to perform AND logic operation whereas a second threshold optical signal is employed for performing OR logic operation. Exclusive-OR operation is provided by performing both AND and OR logic operations in parallel on the same data signals with separate S-SEED devices and then using an S-SEED S-R flip-flop to process the output optical signals from each logic gate (e.g., AND output to R input and OR output to S input) for generating an Exclusive-OR output signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile