The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 1990

Filed:

Jun. 22, 1988
Applicant:
Inventors:

Fumio Baba, Kawasaki, JP;

Kazuya Kobayashi, Itabashi, JP;

Seiji Enomoto, Seto, JP;

Hiroaki Ogawa, Nagoya, JP;

Assignees:

Fujitsu Limited, Kawasaki, JP;

Fujitsu VLSI Limited, Kasugai, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
36518905 ; 36523003 ; 365 78 ; 340799 ;
Abstract

A semiconductor memory device having a register and a memory cell array includes a controlling circuit for disconnecting an input/output circuit from a data bus and turning OFF a transfer gate provided between the register and data bus in a first operation mode and for connecting the input/output circuit to the data bus and turning ON the transfer gate in a second operation mode. In the first operation mode, a data read or write operation is performed between the memory cell array and an external circuit, and alternatively in the second operation mode the data read or write operation is performed between the register and the external circuit.


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