The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 1990
Filed:
Jun. 15, 1988
William M Needles, Arlington, TX (US);
National Semiconductor Corp., Santa Clara, CA (US);
Abstract
A 16-bit adder architecture configured uniquely as two 8-bit adders. The first 8-bit adder uses a static technique to perform addition of the least significant bits and a dynamic technique to perform addition on the remaining bits. The second 8-bit adder uses a static technique to perform addition of the most significant bits and a dynamic technique to perform addition on the remaining bits. The two 8-bit adders are combined at the most significant bit of the first adder and the least significant bit of the second adder using the carry out of the first adder and the carry in of the second adder. A static logic gate is used to logically combine and correctly time the combination of the two 8-bit adders into a single, high-speed 16-bit adder.