The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 1990

Filed:

Feb. 28, 1989
Applicant:
Inventors:

Walter E Milberger, Severna Park, MD (US);

Franklin B Jones, Catonsville, MD (US);

Charles S Kerfoot, Pasadena, MD (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330277 ; 330297 ; 330310 ;
Abstract

This high voltage linear FET amplifier operates at voltage levels of ten's of thousand's of volts with power dissipation capabilities in the kilowatt range. It is a broadband device which features power amplification from DC to frequencies well in excess of 100 KHz. The amplifier uses a unity-gain inverting amplifier as its basic building block. N-number of these building blocks are stacked to accommodate whatever voltage stand-off level is desired. To operate stacked high voltage amplifiers, it is necessary to provide a bias shift (reference) progressively increasing in equal increments from the ground reference stage to the highest voltage level stage while preserving the fidelity of the signal applied to the first stage. This is done by establishing a phantom ground at all amplifiers for each progressive bias level.


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