The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 1990
Filed:
Mar. 13, 1989
John Qualich, Wheeling, IL (US);
Motorola Inc., Schaumburg, IL (US);
Abstract
A first signal (V.sub.1) related to FET drain to source voltage and a second signal (V.sub.2) related to FET source current are compared and the FET (11) is turned off when the first signal exceeds the second signal by a predetermined amount. This corresponds to turning the FET off whe the drain to source on resistance of the FET exceeds a FET on resistance value corresponding to a maximum allowable FET die temperature. Thus the FET is turned off for excessive due temperatures to prevent damage to the FET. A start-up circuit (41, 42) is provided to insure proper initial turning on of the FET, and a short circuit protection circuit (30) is provided for turning the FET off it the source current exceeds some maximum current limit. Accurate, effective monitoring of the FET die temperature is provided without the use of an additional temperature sensing element provided adjacent the FET.