The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 1990
Filed:
Nov. 25, 1988
Jyh-Ping Hwang, Schenectady, NY (US);
Wen-Tai Lin, Schenectady, NY (US);
Miran Milkovic, Scotia, NY (US);
Sharbel E Noujaim, Clifton Park, NY (US);
General Electric Company, Schenectady, NY (US);
Abstract
An approach to A/D converter architecture is based on a 'pipelined and submerged' architecture which includes a pipeline of elemental stages (10.sub.i). Each stage of the pipeline comprises a low-resolution flash A/D subconverter (12), a D/A converter (14), and a unity-gain buffer (16). To minimize converter nonlinearity due to component mismatches, a self calibration technique based on an 'interpolation' scheme is used. This technique employs an on-chip delta-sigma A/D converter (32) to provide the reference for calibration and a 100-bit memory (50) to store nonlinearity information. Long term drift is corrected by a calibrator (34) in parallel with data conversion.