The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 1990
Filed:
May. 23, 1988
Carole A Fisher, Horley, GB;
David H Paxman, Redhill, GB;
U.S. Philips Corporation, New York, NY (US);
Abstract
A method of manufacturing a semiconductor device in which a lateral insulated gate field effect transistor (IGFET) (1) is provided by defining an insulated gate structure (12) on a given surface (3a) of a semiconductor body (3) by providing an insulating layer on the given surface (3a) having a relatively thin region on a first area of the given surface adjoining a relatively thin region (14a) on a second area (31b) of the given surface and providing a conductive layer (15,16) on the insulating layer to define an insulated gate over the first area of the given surface with the conductive layer extending up onto the relatively thick region of the insulating layer. A window (26) is opened in the conductive layer on the relatively thick region of the insulating layer and the insulating layer is then etched isotropically through the window in the conductive layer to form a window (25) in the relatively thick region of the insulating layer thereby leaving part (29) of the conductive layer overhanging the edge of the window in the insulating layer. The conductive layer is then selectively etched with at least the area of the conductive layer spaced from the window masked so as to remove the part (29) overhanging the edge of the window (25) in the insulating layer. Impurities are then introduced using the insulated gate structure (12) as a part of a mask to form a source region (9) aligned with the insulated gate and a drain region (10) aligned with the window in the conductive layer (15, 16).