The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1990
Filed:
Apr. 24, 1987
Kimio Ooe, Kawasaki, JP;
Nobutaka Amano, Tokyo, JP;
Takashige Kubo, Hachioji, JP;
Kaoru Moriwaki, Hadano, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi Microcomputer Engineering Ltd., Tokyo, JP;
Abstract
In a logic simulation method for performing logic simulation of a logic circuit including a circuit with unknown internal logic, the circuit itself with the unknown internal logic is used. The internal status of the circuit is set at an objective status using the interrupt operation afforded by the circuit and thereafter, input signal value is applied to the circuit to obtain a resultant output. For other logic circuits without unknown internal logic, software logic simulation is performed. During such software logic simulation, the actual circuit with unknown internal logic is called.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile