The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1990
Filed:
Sep. 16, 1988
Franciscus T Vonk, Eindhoven, NL;
Cornelis A Wesche, Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
System for asymmetrical signal transmission from a pair of transmission devices (AT,VT) through a pair of signal paths (ASL, ARL; VSL, VRL) each having at least one signal line (ASL, VSL) and one reference line (ARL, VRL) to a pair of receiver devices (AR', VR), two devices (AT, VT) of which having a supply reference potential (G1) in common and being coupled to one end of each of the two signal paths (ASL, VSL), and the other two devices (AR', VR) of which having a further supply reference potential (G2) in common and being coupled to the other end of each of the two signal paths (ASL, VSL). In order to prevent unwanted cross-talk in such a system, which cross-talk may be caused through the connections of the reference lines (ARL, VRL) of the two signals paths (ASL, ARL; VSL, VRL) to the two supply reference potentials (G1, G2), a differential stage (DS) for common mode suppression is disposed in at least one (AT) of the said devices between a pair of input terminals (IS, IR) and a pair of output terminals (OS, OR). If disposed in one of the said transmission devices the differential stage (DS) is coupled at one end through a signal terminal (IS) of the pair of input terminals (IS, IR) to a signal source (A) and through a reference terminal (IR) to one (G1) of the two supply reference potentials and at the other end through a signal terminal (OS) of the pair of output terminals (OS, OR) to the signal line (ASL) and through a reference terminal (OR) to the reference line (ARL) of one of the two signal paths.