The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 1990

Filed:

Sep. 08, 1988
Applicant:
Inventors:

Shousei Yoshida, Tokyo, JP;

Susumu Otani, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
328 61 ; 328 63 ; 328155 ; 375110 ; 375119 ; 331 18 ; 307269 ;
Abstract

In a variable bit rate clock recovery circuit, a phase difference between an input demodulated signal and a recovered clock signal is detected, the detected phase difference signal is filtered by a loop filter and is then integrated, the integrated signal is supplied as an address to first and second ROMs, which store data of cosine and sine waves in advance, output data from the first and second ROMs are respectively D/A-converted by first and second D/A converters, an output signal from a variable frequency generator is modulated by using an output from the first D/A converter, a signal obtained by shifting the output signal from the variable frequency signal generator by .pi./2 radians is modulated by an output from the second D/A converter, and the respective modulated signals are synthesized, thereby obtaining a reference clock signal.


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