The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 1990
Filed:
Aug. 05, 1988
Toshiyuki Kanoh, Tokyo, JP;
NEC Corporation, , JP;
Abstract
A circuit for comparing the magnitudes of two binary signals using five n-channel MOSFET transistors, one p-channel MOSFET transistor and two inverters. The circuit includes two input terminals, an auxiliary input terminal, an output terminal, and terminals for connecting the comparing circuit to a power supply and ground. When the binary signal applied to the first input terminal exceeds the binary signal applied to the second input terminal, the output is a first logic level. Conversely, when the binary signal applied to the second input terminal exceeds the binary signal applied to first input terminal, the output is a second logic level opposite to the first level. If the binary signals applied to the first and second input terminals are the same logic level, the output is the same logic level as the binary signal applied to the auxiliary input terminal. The circuit can be arranged in various configurations, including one in which a resistor is used in place of the p-channel MOSFET. A number one-bit comparing circuits can be cascaded together to form an n-bit comparing circuit.