Method and circuitry for controlling the compensation of negative

Abstract

Circuitry for controlling the operation of a transient voltage compensation circuit is disclosed. An input buffer circuit 10 is provided which includes a phase splitter transistor 30 having a base at which input signals are applied and an emitter which is coupled to internal ground through Schottky diode 32. A compensation circuit 12 prevents the undesirable switching of transistor 30 during fluctuations in the internal ground voltage level by drawing current from the base of transistor 30 through transistor 42 which has a base connected to a source of current and an emitter connected to internal ground. Transients in the internal ground level effect the turn on of transistor 42 which prevents the turn on of transistor 30 under low input voltage conditions. A compensation control circuit 11 is provided to disable compensation circuit 12 under high input voltage conditions yet allow its normal operation when a low voltage level is applied at the input. A high voltage level on the input (and also the base of transistor 30) turns transistor 25 off allowing its base to rise to a voltage level sufficient to overcome the threshold voltage set by diodes 23 and 24 and transistor 18. When transistor 18 turns on current is drawn from the base of transistor 42 turning it off which disables compensation circuit 12 and ensures a stable high level on the base of transistor 30.