The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 1989
Filed:
Oct. 19, 1988
Ikuo J Sanwo, San Marcos, CA (US);
John D Simeral, San Diego, CA (US);
Richard A Daniel, Escondido, CA (US);
NCR Corporation, Dayton, OH (US);
Abstract
The subject invention is an ECL to CMOS converter for converting high or low ECL logic signals. The converter comprises a CMOS inverter for providing low or high CMOS logic signals at its output in response to a first or second signal, respectively, applied to its input. The first signal must exceed a first predetermined value and the second signal must fall below a second predetermined value. The first and second predetermined values are such that either the low ECL signal does not fall below the second predetermined value or the high ECL signal does not exceed the first predetermined value. The converter also provides means for converting the high and low logic signals to the first and second signals, respectively.