The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 1989
Filed:
Dec. 28, 1987
Applicant:
Inventor:
Akira Kanuma, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 223 ; 371 224 ;
Abstract
A logic integrated circuit includes a FIFO type memory circuit provided for testing. A logic value at each test node is stored in the memory circuits during a write-in enable period set by a control signal from a flip-flop or an externally supplied control signal, and the memory data is read out from the memory circuits, to trace the output states of internal bus, register, multiplier, and the like.