The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 1989
Filed:
May. 12, 1986
Raymond M Warner, Jr, Edina, MN (US);
Ronald D Schrimpf, St. Paul, MN (US);
Alfons Tuszynski, San Diego, CA (US);
Regents of the University of Minnesota, Minneapolis, MN (US);
Abstract
A single-crystal monolith containing a 3-D doping pattern forming varied devices and circuits that are junction-isolated. The semiconductor monolith includes interconnecting signal paths and power buses, also junction-isolated, usually with N+ regions within P matrix regions, and tunnel junctions, N+ - P+ junctions, as ohmic contacts from N-type to P-type regions. An isolating box incorporates an orthogonal isolator. The 3-D structure places layers of critical profile normal to the growth axis. The orthogonal isolator can include floating elements. The 3-D semiconductor monolith can be manufactured through continuous or quasicontinuous processing in a closed system, such as through MBE or sputter epitaxy. Also, a thin layer of silicide can be provided as an ohmic contact and/or a thick layer of silicide can be provided as a conductor thereby providing monocrystalline 3-D devices or integrated circuits. Finally, an insulator can be provided about an entire device for isolation.