The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 1989

Filed:

Oct. 28, 1987
Applicant:
Inventors:

Shin Katsu, Takatsuki, JP;

Shutaro Nambu, Ibaraki, JP;

Akio Shimano, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307279 ; 307448 ; 3072721 ; 307291 ;
Abstract

An FET circuit suitable for a latch has a pair of inverters. The input stage FET of each of the inverters is connected such that the gate electrode thereof is connected to receive an output signal of the FET of the other inverter through a circuit having an FET and at least a diode. The sources of the input stage FETs are connected to a common connection point, and a current source arrangement such as a resistor is connected between the common connection point and a power supply terminal. The circuit provides an extended allowable range of the effective threshold voltage V.sub.T and has small power consumption.


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