The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 1989

Filed:

Mar. 17, 1988
Applicant:
Inventors:

Robert W Bassett, Essex Junction, VT (US);

William R Griffin, Shelburne, VT (US);

Susan A Murphy, South Burlington, VT (US);

John G Petrovick, Jr, Colchester, VT (US);

James R Varner, Essex Junction, VT (US);

Dennis R Whittaker, Fairfax, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G04F / ; G01R / ; G06F / ;
U.S. Cl.
CPC ...
368113 ; 324 / ; 371 221 ;
Abstract

An apparatus and method for testing an access time of a macro embedded in a LSI chip. The apparatus includes a logical gate connected to the output latches of the macro, thereby controlling the access time of the macro, and a test latch for determining an on-chip delay time between a test signal for enabling the output latches and an input signal for enabling the macro. The method includes the steps of determining the on-chip delay time between the test signal and the input signal, thereby allowing the test signal to be synchronized with the input signal, supplying the synchronized test signal to the output latches for a manufacturer specified macro access time, and testing the latched output data from the macro.


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