The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 1989
Filed:
Mar. 11, 1988
Applicant:
Inventors:
Chih-Sieh Teng, San Jose, CA (US);
Tian-I Liou, San Jose, CA (US);
Hiekyung Chun-Min, Los Altos, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 47 ; 437 34 ; 437 57 ; 437 60 ; 437919 ; 437985 ; 148D / ; 357 236 ;
Abstract
An N+ poly-to-N+ silicon capacitor structure is provided by adding a single mask step to a standard CMOS process flow. The capacitor oxide between the N+ poly plate and the N+ silicon plate is grown simultaneously with gate oxide for the MOSFET devices. A high dose, deep phosphorous implant is employed to form the N+ substrate plate. This results in an excellent capacitance voltage coefficient. The resulting thin interplate oxide leads to high capacitance per unit area and, thus, small die size.