Scientific processor vector file organization

Abstract

A vector file organization for a multiple pipelined vector processor with data transfer capability to support multiple program execution pipelines. Multiple pipelines can simultaneously access various blocks of the vector file through segmenting the file storage and by addressing the various elements of the segments. Vector files of programmable registers each have storage for sixty-four elements of 36-bit words or thirty-two elements of 64-bit words. Six independent execution pipelines in combination can programmably access the vector files for either read operands or write operands or both. Each vector file has N independent blocks, each using a RAM with read output to the pipelines, an address register and a write data register. Each block holds interspersed word pairs of words of each vector file. Primary and secondary vector files are equal in capability and allow reading pairs of elements, as required by arithmetic instructions. Shadow storage similarly arranged and addressed provides storage for intermediate result vectors. A time slot management mechanism uses N registers connected in serial loop, to allocate and reserve access to the vector files by the execution pipe for each instruction execution to maintain its function. It forms a read or write address for both the primary and secondary files and references all N blocks in a pass.